Electronic system level, an emerging systems engineering design methodology that allow deisgner to perform Architectural exploration informed by accurate design analysis, Early realization of models in working silicon that yield design performance and timing metrics, Fast accurate simulation and testbench reuse, Rapid prototyping and deployment of designs in reconfigurable architectures and Dramatic reductions in overall design time.

Algorithmic Acceleration Through Automated Generation of FPGA Coprocessors

Accellerating Bilateral Filtering in Xilinx FPGAs

C-Synthesis Fundamentals

SystemC Behavioral Design and Synthesis