Test Designer™

Simulation Features

• IsSpice4: Intusoft’s significantly enhanced SPICE 3.F5 and XSPICE based simulation kernel
• Unlimited circuit size and tremendous convergence enhancement for simulation of large-scale mixed-signal ICs, circuits, systems, RF and power electronic design.
• All SPICE analyses: AC, DC, operating point, transient, DC sweep, noise, distortion, for./rev., Fourier, AC/DC and transient sensitivity, Pole-Zero, nested sweep and interactive parametric sweep, temperature
• Real time waveforms that display different types of simulations
• Monte Carlo, Worst Case, Extreme Value, root summed squares, design optimization, pole-zero, 2-port with Smith Chart
• Automated Failure Analysis/Fault simulation
• Visual Basic/OLE Interface
• State-of-the-art convergence algorithms and help wizards

Fault Mode Definition

• Provides special fault definition dialog with predefined part failure modes as per the Navy’s CASS standard
• Failure Parameters dialog for definition of open, short and stuck behavior. Faults can include expressions of time and other circuit parameters.
• Component values and parameters, plus subcircuit connections, set as faulted or out-of-tolerance
• Reasonable defaults set for all failure modes for increasing productivity

Unique Schematic-Based Design

• Multiple schematic configurations for design and stimulus variations in a single schematic database
• Multiple schematic layers for fast and easy design configurations

Failure Analysis

• Helps identify and troubleshoot circuit malfunctions
• Automatic simulation of all failures and out-of-tolerence conditions with the push of a button
• Failures invoked during any SPICE analysis
• Circuit descriptions automatically generated so no need to “code” or “script” failure behavior

Failure Analysis

• Select Failure Mode dialog for quick selection of any defined faults for simulation
• “What-if” scenarios automatically simulated with collection of multiple circuit measurements
• Report of pass/fail statistics provided, plus visual test status meter for each circuit change or failure

Modelling Analysis

• Comprehensive SPICE Model Library (23,500+ components), with greater than 446 part types
• Advanced behavioral modeling such as math expressions, if-then-else, AHDL, and table & Laplace models.
• Enter expressions for R, L and C models such as frequency, temperature, conditional statements to alter simulation run
• MESFET models including, HMET and Anadigics model
• MOSFET models including very latest EKV, BSIM3 and BSIM4
• Lossy Transmission line model
• Library Manager that organizes and archives models, including comparison and search
• SpiceMod for easy creation of new models, or altering existing ones, including test bed verification
• Pspice to IsSpice4 model converter
• IBIS-to-SPICE converter to version 3.2
• Revolutionary GFT models that preserve closed loop design and DC operating characteristics while measuring open loop properties. Great for IC and SMPS design
• Linking of sizable data arrays from external hardware/software to IsSpice4, using OLE2 automation servers inherent to SALT. Simulation data is viewed during simulation

Other Key features

• The DSP Designer option enables digital control and other aspects of DSP design to be visually simulated as transfer functions and equivalent assembly code instructions using special device models.
• Complete storage of simulation setup, runs, and post-simulation verification for regression testing
• Cross probe any node or component on schematic after simulation and view instant waveforms on schematic or in IntuScope in 3 selectable modes
• Industry’s most advanced wave viewer “IntuScope” for viewing multiple simulation runs, extracting numerical data and performing numerous waveform operations. Includes all voltages, currents, power dissipations, multiple graphs, full set of cursor measurements and wave markers, plus extensive wave calculator of 150 functions. Unique Digital Data Viewer lets user prescribe any signals as a buss in a variety of numerical and mnemonic formats, then view as tabular data against a system clock.